Antonio Francisco Díaz García
Catedrático de Universidad
Grado en Ingeniería Electrónica Industrial
Grado en Ingeniería Informática
Grado en Ingeniería Informática y Matemáticas
Programa de Doctorado en Tecnologías de la Información y la Comunicación
Máster Universitario en Electrónica Industrial
I am an associate professor of the Department of Architecture and Computer Technology at the University of Granada, and member of the Center Council of the Center for Research in Information Technologies and Communications (CITIC-UGR).
My line of research has focused on the study of efficient communications as well as high-performance computer architectures. My PhD. thesis, "Efficient communication in local area networks for parallel processing in clusters", was the starting point in these fields, and since then I have worked with high-performance networks (Gigabit Ethernet and Infiniband) defining optimized protocols for these networks as well as in multicore architectures.
In 2006, I was the lead investigator of the project "Scalability and high availability in cluster computing" (Proyectos de Excelencia, Junta de Andalucía. (P06-TIC-1935) 2007-2010) which was focused on how to solve several problems related to service scalability and reliability with computers in a cluster.
Later, in 2011, I was the lead investigator of the project "AbFS: Parallel Storage System and very massive for HPC & Cloud Computing. Programa Nacional de cooperación Público-Privada. Subprograma INNPACTO. Ministerio De Ciencia e Innovación (IPT-2011-1728-430000) 2011-2014". In this project, I studied and developed a Distributed File System with high-performance requirements.
Since 2016, I am Member of the ANTARES and KM3NeT Collaborations, and I have been co-PI of the Project "Participation of UGR in ANTARES, KM3NeT-ARCA/ORCA & PDG" Programa Estatal de Fomento de la Investigación Científica y Técnica de Excelencia, Subprograma Estatal de Generación de Conocimiento, 2015, (FPA2015-65150-C3-3-P). During the last three years, I have been working on the Data Acquisition Task Force, being responsible at UGR of the characterization and validation of the data transfer and time synchronization systems of the KM3NeT distributed network. I have started the setup of a test bench to test and validate White Rabbit switches, the first step towards the creation of a KM3NeT Common Infrastructure at UGR for more general time calibration tests. I have also been involved in analysis tasks, mainly on the parallelization and optimization of several applications. I have also expertise on related topics such as distributed programming, GPU programming, security in networks and system, HPC and green computing. This work has been published in Journals and presented in Conferences.